I haven't made much progress since the last post.
- Resolved blocking issue WRT to the simulator
- collector and monitor complete for the adc bus and the sample_iface bus
- started tracing the sample_in != sample_out issue
Taking a look at sample_in != sample_out
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| Sample going into the DUT (adc controller) vs the sample coming out |
This image shows the basic error. The sample being pulled from the ADC is 0xe95 but the sample going out is 0x74A.
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| Individual signals showing "off by 1" error |
After looking at the signal breakdown it becomes clear that this is some kind of off by 1 error. The input sample is 0b111010010101 which is not equal to the binary sample in the above image.
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